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【中文概述】本文介绍 SiC/GaN 功率 MOSFET 与 IGBT 双脉冲测试（DPT）的原理、三阶段波形、开通/关断与反向恢复参数定义，以及用 AFG31000 与 4/5/6 系列 MSO 的实测配置。以下正文为英文原文。
中文概述：双脉冲测试（Double Pulse Test, DPT）是测量功率器件开关参数与动态行为的首选方法，符合 JEDEC JEP182、IEC 60747-9 等标准。测试在受控电压、电流、温度下进行，用脉冲限制器件自热。本文讲解开通/关断时延、上升下降时间、开关能量 Eon/Eoff、动态 RDS(on)、二极管反向恢复（trr/irr/Qrr/Err）等参数定义，并给出基于 AFG31000 任意函数发生器 + 4/5/6 系列 MSO + IsoVu 隔离探头的实测配置。
Power semiconductors are transitioning from silicon to wide-bandgap SiC and GaN, enabling smaller, faster and more efficient designs. Switching losses are inevitable, so engineers must rigorously measure switch timing and associated energy losses. The preferred method is the Double Pulse Test, described in JEDEC JEP182, JESD24-10 and IEC 60747-9/-8.
DPT measures switching parameters and evaluates dynamic behavior under controlled voltage, current and temperature. Pulses limit self-heating and keep junction temperature stable. Goals include measuring turn-on parameters (td(on), tf, ton, ID, dv/dt, di/dt, Eon, dynamic RDS(on)), turn-off parameters (td(off), tr, toff, VDSM, Eoff, Qoss), and reverse recovery (trr, irr, Qrr, Err, di/dt, VSD).
Energy loss is computed by integrating instantaneous power (VDS × ID) over turn-on and turn-off. Reverse recovery current flows briefly as the diode switches from forward to reverse bias, adding Qrr and Err loss.
Warning: power-semiconductor tests involve lethal voltages/currents; use enclosures with safety interlocks and PPE. Typical setup: an AFG (e.g. AFG31000 with DPT app) for gate pulses, a high-voltage DC supply for VDD, a multi-channel oscilloscope to capture VDS/VGS/ID, and probes — e.g. IsoVu isolated voltage/current probes for high-side floating measurements and a clamp-on current probe for the load inductor.
